Contribution Details |
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BoF 1: PRACE Future Technologies Evaluation Results |
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Tuesday, June 19, 2012
9:00 AM - 9:45 AM |
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Hall C2.1
CCH - Congress Center Hamburg |
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| Speakers: |
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Dietmar Erwin, Forschungszentrum Jülich |
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Jonathan Follows, STFC Daresbury Laboratory |
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Giannis Koutsou, The Cyprus Institute |
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Gilbert Netzer, Royal Institute of Technology |
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Alex Ramirez, Universitat Politècnica de Catalunya & BSC |
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Torsten Wilde, LRZ |
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| Abstract: |
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The Partnership for Advance Computing in Europe (PRACE) explores a set of prototypes to test and evaluate promising new technologies for future multi-Petaflop/s systems. These include GPUs, ARM processors, DSPs and FPGAs as well as novel I/O solutions and hot water cooling. A common goal of all prototypes is to evaluate energyconsumption in terms of “energy-to-solution” to be able to estimate the suitability of those components for future high-end systems. For this purpose, the “Future Technologies” work package developed an energy-to-solution benchmark suite. A synopsis of the assessments and selected results will be presented in a short series of presentations and discussions.
Jonathan Follows: STFC: PRACE Technology Watch: Implications for multi-petascale systems
This talk presents a synthesis of our technology watch reports highlighting key areas in which new technologies are likely to be deployed and the kinds of technologies we can expect to see.
Torsten Wilde, LRZ: Hot water cooled prototype at LRZ
HPC centers are facing the challenge of balancing the compute power of new supercomputers with increasing energy costs. One possible way of reducing the total cost of ownership (TCO) is the move from air cooled systems to water cooled ones. LRZ is investigating the possibility of using “free” cooling (just passive heat exchangers) instead of water chillers and is evaluating the possible power efficiency of such a system and its effect on TCO.
Alex Ramirez, BSC: ARM-based HPC prototypes at BSC
This presentation describes the architecture of the ARM-based HPC cluster prototypes deployed at Barcelona Supercomputing Center, as well as the initial performance, scalability, and energy-efficiency measurements. It will also discuss the lessons learned by these deployments, future projections, and guidelines on how to design and built future ARM-based systems.
Giannis Koutsou, CASTORC: GPU cluster evaluation
This presentation reports on the evaluation of a hybrid CPU/GPU cluster. An overview of the system will be given followed by results on benchmark performance, power efficiency and scalability. We will conclude with a discussion on programming techniques.
Gilbert Netzer, SNIC-KTH: Digital Signal Processors for Energy Efficient HPC
A short overview of the usage of Digital Signal Processors in the context of High Performance Computing is given. Energy efficiency results for a number of kernel and application benchmarks will be presented to show the potential of this type of processor architecture in the HPC context. |
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