Monday, June 17 |
| Monday, June 17
Conference & Exhibition Guide
Conference & Exhibition Guide
General Information
Sunday, June 16
Monday, June 17
Tuesday, June 18
Wednesday, June 19
Thursday, June 20
01:00 pm − 06:00 pm
HPC Crash Course
CCL, Level +1, Hall 4
Bernd Mohr, JSC
02:00 pm − 03:00 pm
Interconnects & Topologies for HPC Systems –
State of the Art & Future Trends
CCL, Level +1, Hall 2
Frank Baetke, Hewlett-Packard
02:00 pm − 02:30 pm
Benefits & Pitfalls of Advanced Interconnect Topologies
Michael Kagan, Mellanox Technologies
02:30 pm − 03:00 pm
System Level Optical Interconnects − Advantages, Progress & Challenges
Moray McLaren, Hewlett-Packard Labs
03:00 pm − 04:00 pm
Coffee Break
Level 0, Exhibition Hall
03:00 pm − 04:00 pm
HPC in Asia Poster Session
CCL, Level +1, Hall 3 Foyer
(01a) Supercomputing in Western Australia & Opportunities for Asia
George Beckett, University of Western Australia
(02a) Peta-Scale General Solver for Semidefinite Programming Problems with
over Two Million Constraints
Katsuki Fujisawa, Chuo University & JST CREST
(03a) HA-PACS/TCA: Tightly Coupled Accelerators for Low-Latency
Communication among GPUs
Toshihiro Hanawa, University of Tsukuba
(04a) An Optimized Power Architecture for Supercomputers
Shiping Hu, NUDT
(05a) Application-Level Checkpoint/Restart Framework with Optimal Check
point Interval
Hideyuki Jitsumoto, University of Tokyo
(06a) GlobeVis: A Visualization System for Large-Scale Climate Simulation Data
Liu Jun, Chinese Academy of Sciences
(07a) High Performance Computational Fluid Dynamics
Christian Klettner, National University Hospital Singapore
(08a) GPU Implementation of Lennard-Jones Molecular Dynamics Using CUDA
Sumit Kumar, Indian Institute of Technology
(09a) GPU Implementation of Count-Min & Count Sketches for High Speed
Streams in Shared Memory Environment
Sumit Kumar, Indian Institute of Technology
(10a) Development of Parallelized Plasma PIC Simulation
Masaharu Matsumoto, University of Tokyo
(11a) Applications on TH-1A
Xiangfei Meng, National Supercomputer Center in Tianjin
(12a) Toward Interactive Supercomputing: Simulation Caching & Multi-Client
Web-Based Interactive HCI
Shin-ichiro Mori, University of Fukui
(13a) XMP-dev/StarPU: High Level Parallel Programming for GPU/CPU Work
Tetsuya Odajima, University of Tsukuba
(14a) Performance Evaluation of SpMV on Current Parallel Processors –
Satoshi Ohshima, University of Tokyo
(15a) ArCUDA: An ArBB to CUDA Translator
Vibha Patel, Indian Institute of Technology
(16a) Weighted Distribution for Random Victim Selection in Distributed Work
Swann Perarnau, RIKEN
(17a) A Congestion Avoidance Technique Using Aggressive Packet Pacing
toward Exascale Interconnect
Hidetomo Shibamura, ISIT
(18a) A GPU Application for Digital Forensic
Sang Su Lee, ETRI
(19a) GPU Accelerated Fock Matrix Preparation in OpenFMO
Hiroaki Umeda, University of Tsukuba
(20a) Fast NIC Offload of MPI Barrier for Large Scale Parallel Computers
Shaogang Wang, NUDT
(21a) A NVIDA Kepler Based Acceleration of PIC Method
Minhua Wen, Shanghai Jiao Tong University
(22a) Parallel Implement of Isolation with Migration Model
Chunbao Zhou, Chinese Academy of Sciences
(23a) H2FS: A Hybrid Hierarchy File-System for Scalable Data-Intensive
Computing for HPC Systems
Enqiang Zhou, NUDT
04:00 pm − 05:00 pm
HPC Cloud − From Algorithms to Applications
CCL, Level +1, Hall 2
Wolfgang Gentzsch, Executive HPC Consultant
04:00 pm − 04:20 pm
Achieving High Performance in the Cloud
Josh Simons, VMware
04:20 pm − 04:40 pm
Converging Interconnect Requirements for HPC & Warehouse Scale
John Shalf, LBNL
04:40 pm − 05:00 pm
Digital Manufacturing Applications in the Cloud
Wolfgang Gentzsch, Executive HPC Consultant
04:00 pm − 06:00 pm
Research Paper Session 02
CCL, Level +1, Hall 5
Thomas Ludwig, DKRZ
04:00 pm − 04:30 pm
Towards Addressing CPU-Intensive Seismological Applications in Europe
Michele Carpené, CINECA
04:30 pm − 05:00 pm
Leading Edge Hybrid Multi-GPU Algorithms for Generalized Eigenproblems
in Electronic Structure Calculations
Raffaele Solcà, ETH Zürich
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