|Name:||Tofu Interconnect 2: System-on-Chip Integration of High-Performance Interconnect|
|Time:||Wednesday, June 25, 2014
12:30 pm - 12:45 pm
CCL - Congress Center Leipzig
|Speaker:||Yuichiro Ajima, Fujitsu|
|Abstract:||The Tofu Interconnect 2 (Tofu2) is a system interconnect designed for the new generation supercomputer of Fujitsu’s PRIMEHPC FX series. To-fu2 inherited the 6-dimensional mesh/torus network topology from its predeces-sor, and it increases the link throughput by two and half times. It is integrated into a newly developed SPARC64TM processor chip and takes advantages of system-on-chip implementation by removing off-chip I/O between a processor chip and an interconnect controller. Tofu2 also introduces new features such as the atomic read-modify-write communication functions, the session-mode con-trol queue for the offloading of collective communications, harmless cache in-jection technique to reduce communication latency, and system-mode RDMA for overhead reduction of system-wide communication.
Yuichiro Ajima, Tomohiro Inoue, Shinya Hiramoto, Shunji Uno, Shinji Sumimoto, Kenichi Miura, Naoyuki Shida, Takahiro Kawashima, Takayuki Okamoto, Osamu Moriyama, Yoshiro Ikeda, Takekazu Tabata, Takahide Yoshikawa, Ken Seki & Toshiyuki Shimizu, Fujitsu Limited