ISC'14

June 22–26, 2014
Leipzig, Germany

Session Details

 
Name: HPC in Asia Poster Session (during Coffee Break)
 
Time: Thursday, June 26, 2014
10:30 am - 11:00 am
 
Room:   Hall 4
CCL - Congress Center Leipzig
 
Breaks:10:30 am - 11:00 am Coffee Break
 
Presentations: (01a) Science Data Processing for the SKA Radio Telescope
  George Beckett, iVEC
 
(02a) Modeling Power Usage of HPC Systems by RAPL Interface
  Thang Cao, University of Tokyo
 
(03a) Implementing a Hybrid Parallel Overset Grid Algorithm for Computational Fluid Dynamics Applications
  Dominic Chandar, A*STAR
 
(04a) An Initial Microbenchmark Performance Study for Assessing the Suitability of Scientific Workloads Using Virtualized Resources from a Federated Australian Academic Cloud
  Jakub Chrzęszczyk, Australian National University
 
(05a) Proprietary Interconnect with Low Latency for HA-PACS/TCA
  Toshihiro Hanawa, University of Tokyo
 
(06a) Efficient Utilization of Memory Hierarchy on GPU Clusters: Optimization Methods & Performance Models
  Guanghao Jin, Tokyo Institute of Technology
 
(07a) Cancer Genome Analysis Using Next Generation Sequencing & High Performance Computing
  Hyojin Kang, KISTI
 
(08a) Development of an AMR Framework for FDM Applications on Parallel Processors
  Masaharu Matsumoto, University of Tokyo
 
(09a) Galaxies of Supercomputers & Their Underlying Interconnect Topologies Hierarchies
  Marek T. Michalewicz, A*STAR
 
(10a) Cache-Aware Sparse Matrix Format for GPU
  Yusuke Nagasaka, Tokyo Institute of Technology
 
(11a) Parallel Preconditioning Methods for Iterative Solvers Based on BILUT(p,d,t)
  Kengo Nakajima, University of Tokyo
 
(12a) Cardiac Arrhythmias in Mathematical Models of Ventricular Tissue: High-Performance Computing Studies
  Alok Ranjan Nayak, Indian Institute of Science
 
(13a) Application Performance Characterization towards Exa-Scale Supercomputers
  Akihiro Nomura, Tokyo Institute of Technology
 
(14a) Performance Evaluation of SpMV Considering Matrix Layout Parameters
  Satoshi Ohshima, University of Tokyo
 
(15a) Parallelized Mining of Subgraphs Sharing Common Items Using Task-Parallel Language Tascell
  Shingo Okuno, Kyoto University
 
(16a) Nanoelectronics with High Performance Computing: Simulations of Mobility in Nanoscale Transistors
  Hoon Ryu, KISTI
 
(17a) Exploration of Application-level Lossy Compression for Fast Checkpoint/Restart
  Naoto Sasaki, Tokyo Institute of Technology
 
(18a) Multiple PVAS: Parallel Task Model for the Hybrid Architecture Consisting of Many-Core & Multi-Core
  Mikiko Sato, Tokyo University of Agriculture & Technology
 
(19a) Large-Scale Multi-Level Sorting for GPU-Based Heterogeneous Architectures
  Hideyuki Shamoto, Tokyo Institute of Technology
 
(20a) Tailoring HPC Technologies for Australian Researchers
  Lei Shang, Australian National University
 
(21a) Active Packet Pacing as a Congestion Avoidance Technique toward Extreme Scale Interconnect
  Hidetomo Shibamura, ISIT
 
(22a) Efficient Execution of Multiple Applications Using Process Migration
  Taichirou Suzuki, Tokyo Institute of Technology
 
(23a) Programming Interface for Scientific Computing Cloud Service
  Xiaoning Wang, CAS
 
(24a) Implementation of a Fast & Efficient Algorithm for Phase-Field Simulation on Heterogeneous Hardware
  Jian Zhang, CAS